[LLVMdev] ARM assembly

[Tim Northover]

Hi,

> I am working to cross compile (just generate assembly code) a simple C code
> in ARM. First, I use CLANG to get LLVM bytecode, then I use llc to generate
> assembly for ARM. The problem is it never uses any other register except
> r0-r3 and always uses spill code even if other register are available to
> use. Anyone has any idea?

Some example code and output might be useful. Command line options
you're using too.

The only thing I can think of is you might not be generating enough
register pressure that it *needs* to go beyond r0-r3, and maybe
mistaking something else the compiler is doing for a pressure spill.
The following function uses r12 for me, for example ("llc -march=arm
-o - simple.ll"):

@var = global i32 0

define void @foo() {
  %val1 = load volatile i32* @var
  %val2 = load volatile i32* @var
  %val3 = load volatile i32* @var
  %val4 = load volatile i32* @var

  store volatile i32 %val1, i32* @var
  store volatile i32 %val2, i32* @var
  store volatile i32 %val3, i32* @var
  store volatile i32 %val4, i32* @var

  ret void
}

Tim.