[LLVMdev] No more TargetFlags on MO_Register MachineOperands

[Jakob Stoklund Olesen]

All,

The code generator operand class, MachineOperand, has an 8-bit TargetFlags field that the individual targets can use as they please. X86 and ARM use it to encode linker magic on symbol operands.

It has been mentioned a couple of times on this list that it is not safe to use TargetFlags on register operands. This is because many target-independent passes are manipulating register operands when the code is in SSA form, and they can't always preserve flags they don't understand.

I am going to add an assertion that no target flags are added to register operands. This will prevent subtle bugs when flags disappear, and it will free up some space in the MachineOperand struct layout.

None of the in-tree targets need this, external targets should probably be using extra immediate operands to encode  register flags.

/jakob