[LLVMdev] MI bundle liveness attributes

[Jakob Stoklund Olesen]

On Aug 15, 2012, at 10:17 AM, Andrew Trick <atrick at apple.com> wrote:

> 
> On Aug 13, 2012, at 8:34 AM, Sergei Larin <slarin at codeaurora.org> wrote:
>> Andy, 
>> 
>> Yes, this is what Arnold has suggested also, and from this point it looks
>> like it should work, but it will require parsing the bundle every time we
>> care to know whether this is a real use or a conditional def. This might
>> become awkward... but I guess I should provide a better use case to prove my
>> point.
> 
> Sergei, the MachineInstr properties are exposed at the bundle level, we just don't seem to have the property that you need yet.
> 
> Jakob: would it be generally useful to define either an MC instr or operand flag that indicates a conditionally written register?

I don't think that is necessary.

ARM already does post-RA predication and bundling. It just adds an <imp-def> operand for the predicated defs.

We can't currently represent predicated instructions before register allocation because SSA form requires different input and output virtual registers, but that doesn't seem to be Sergei's problem.

But I agree with Sergei that he needs to provide a better use case ;-)

/jakob