[LLVMdev] ARM CPSR liveness

[Jim Grosbach]

Hi David,

I'm not too familiar with the LiveVariables pass in particular for how it uses this information, but CPSR definition is handled on ARM instructions in two ways:
a) As an OptionalDef explicit MachineOperand ("cc_out" in the .td files) which is set to "zero_reg" if CPSR is not modified and "CPSR" if CPSR is modified, or
b) as an implicit definition on the instruction class, which you'll see in the .td file as a "let Defs = [CPSR]" on the instruction definition.

Uses of CPSR are handled like (b), with "let Uses = [CPSR]" on the instruction definition in the .td file.

These uses and defs, including <def> and <kill> markers on the operands, should be fairly reliable. If you find cases where they're not, that's bugs we want to fix.

-Jim

On Sep 7, 2011, at 10:45 AM, David Sehr wrote:

> All,
> 
> ARM LLVM afficianados: I'm trying to understand how LiveVariables computes liveness for CPSR.  In particular,
> I would like to tell whether a particular instruction is a use/kill/def for doing some within block liveness checking I need.
> 
> Thanks in advance,
> 
> David
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