[LLVMdev] Constraints with Subregisters

Johannes Birgmeier e0902998 at student.tuwien.ac.at
Sat Oct 15 11:04:06 PDT 2011


is there a way to formulate a constraint like this:

let Constraints = "${src:sub_even} != $dst" in { ... }

, that is, only if a subregister of $src != $dst then ...?

Perhaps this is entirely the wrong way anyway. I'm trying to implement 
(s/z/any)ext & trunc from 32 to 64 bit integer on a TI C64x processor. 
64 bit ints are always stored in two adjacent registers (not uncommon, 
cf. SystemZ and Sparc float). The processor does not have a special 
instruction for this (unlike Sparc, if I'm not mistaken), so it 
basically boils down to a "mv ${src:sub_even}$dst". Obviously, this can 
be omitted if the output would be "mv X, X".

Any help is greatly appreciated!


Johannes Birgmeier 0902998
my key is at http://pgp.mit.edu/

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