[LLVMdev] MIPS 32bit code generation
Carter, Jack
jcarter at mips.com
Thu Oct 6 11:26:51 PDT 2011
A simulator should be expecting the machine opcodes not macros. LD shouldn't care at all as long as the object format plays well.
I would think it would be better to fix the simulator.
Jack
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Today's Topics:
1. Re: LLVM IR is a compiler IR (David A. Greene)
2. MIPS 32bit code generation (Gang-Ryung Uh)
3. Re: MIPS 32bit code generation (Eric Christopher)
4. TableGen and Greenspun (Jakob Stoklund Olesen)
5. Re: MIPS 32bit code generation (Gang-Ryung Uh)
6. Re: replacing a global variable by a constant (neda 8664)
7. Re: replacing a global variable by a constant (Duncan Sands)
8. Re: VLIW Ports (Carlos S?nchez de La Lama)
9. Re: svnsync of llvm tree (Oliver Schneider)
10. Re: svnsync of llvm tree (Oliver Schneider)
11. TR : LLVM and VHDL simulation (Baggett Jonas)
12. Re: TableGen and Greenspun (David A. Greene)
13. Re: svnsync of llvm tree (David A. Greene)
14. Re: svnsync of llvm tree (Jeff Fifield)
15. Re: LLVM and VHDL simulation (Jianzhou Zhao)
16. Re: TableGen and Greenspun (David A. Greene)
17. How to create arguments CallInst (Rafael Baldiati Parizi)
18. Re: How to create arguments CallInst (John Criswell)
----------------------------------------------------------------------
Message: 1
Date: Wed, 05 Oct 2011 17:10:36 -0500
From: greened at obbligato.org (David A. Greene)
Subject: Re: [LLVMdev] LLVM IR is a compiler IR
To: Joachim Durchholz <jo at durchholz.org>
Cc: llvmdev at cs.uiuc.edu
Message-ID: <nngk48j5btv.fsf at transit.us.cray.com>
Content-Type: text/plain; charset=us-ascii
Joachim Durchholz <jo at durchholz.org> writes:
> Now that the dust begins to settle... I'm wondering whether LLVM is for me.
>
> I'm working on something that can be used to create software for
> different environments: C/C++, JVM, CLR, Parrot, etc.
> I.e. one language for different environments, but not write once, run
> anywhere.
>
> Now what would be the role of LLVM in such an infrastructure?
> Just backend for C/C++ linkage, and I should go and look elsewhere for
> JVM/CLR/whateverVM?
> Should I look into LLVM subprojects? Which ones?
It depends on what you want to do with the IR. If you want to create
object files, LLVM is great. You just need to map the semantics of the
various HLLs onto the LLVM IR language, as with any translator. For any
kind of code-generator-ish thing, it's hard to beat LLVM IR, IMHO.
If you want to JIT, then some of LLVM IR's limitations will impact the
speed of code generation, as Dan outlined.
If you want to do fancy transformations that use or analyze high-level
language semantics, LLVM IR may not be right for you, as most of that
information is lost by the time the code has been converted to LLVM IR.
-Dave
------------------------------
Message: 2
Date: Wed, 5 Oct 2011 17:01:48 -0600
From: Gang-Ryung Uh <guh at boisestate.edu>
Subject: [LLVMdev] MIPS 32bit code generation
To: llvmdev <llvmdev at cs.uiuc.edu>
Message-ID:
<CAMp0i=AMYGY6OpepCKdbk6NMzaMZum6dtXRPN9F3ow=vL4P-MA at mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Hi,
In order to emit "la $4,ADDR" instead of lui followed by addiu to load
the data address, could you advise what is proper way to revise td files in
the MIPS target?
Thanks,
--
Gang-Ryung Uh, Associate Professor
Department of Computer Science
College of Engineering, Boise State Univerisity
tel: 1 208 426-5691 e-mail:guh at boisestate.edu
http://cs.boisestate.edu/~uh
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Message: 3
Date: Wed, 05 Oct 2011 16:04:50 -0700
From: Eric Christopher <echristo at apple.com>
Subject: Re: [LLVMdev] MIPS 32bit code generation
To: Gang-Ryung Uh <guh at boisestate.edu>
Cc: llvmdev <llvmdev at cs.uiuc.edu>
Message-ID: <ACB89DEC-01F9-472F-A2D1-EC4C2A91046C at apple.com>
Content-Type: text/plain; CHARSET=US-ASCII
On Oct 5, 2011, at 4:01 PM, Gang-Ryung Uh wrote:
> Hi,
>
> In order to emit "la $4,ADDR" instead of lui followed by addiu to load the data address, could you advise what is proper way to revise td files in the MIPS target?
Why?
-eric
------------------------------
Message: 4
Date: Wed, 05 Oct 2011 17:04:58 -0700
From: Jakob Stoklund Olesen <jolesen at apple.com>
Subject: [LLVMdev] TableGen and Greenspun
To: llvmdev List <llvmdev at cs.uiuc.edu>
Message-ID: <A19B9B72-5673-4463-AF0D-AC286D5EBD5D at apple.com>
Content-Type: text/plain; CHARSET=US-ASCII
The TableGen language seems to be growing Lisp macros from two different directions.
Che-Liang Chiou added a preprocessor with for loops, and David Greene added multidefs.
It seems that some kind of macro facility is needed, perhaps we should discuss what it is supposed to look like?
/jakob
------------------------------
Message: 5
Date: Wed, 5 Oct 2011 18:43:53 -0600
From: Gang-Ryung Uh <guh at boisestate.edu>
Subject: Re: [LLVMdev] MIPS 32bit code generation
To: Eric Christopher <echristo at apple.com>
Cc: llvmdev <llvmdev at cs.uiuc.edu>
Message-ID:
<CAMp0i=BnpGrbxtEqY_d7zThD2M4tYnKBHFisNVX=+fCENuESCQ at mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Hi,
for our micro-architecture research, we are using simplescalar 3.0 32bit
mips simulator, which comes with binutils 1.5.2, and the ld fails at "lui"
(bfd error). However, the ld is happy with "la" (assembler macro) and
simulator correctly simulates.
On Wed, Oct 5, 2011 at 5:04 PM, Eric Christopher <echristo at apple.com> wrote:
>
> On Oct 5, 2011, at 4:01 PM, Gang-Ryung Uh wrote:
>
> > Hi,
> >
> > In order to emit "la $4,ADDR" instead of lui followed by addiu to
> load the data address, could you advise what is proper way to revise td
> files in the MIPS target?
>
> Why?
>
> -eric
>
>
--
Gang-Ryung Uh, Associate Professor
Department of Computer Science
College of Engineering, Boise State Univerisity
tel: 1 208 426-5691 e-mail:guh at boisestate.edu
http://cs.boisestate.edu/~uh
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Message: 6
Date: Thu, 6 Oct 2011 03:36:35 -0400
From: neda 8664 <neda8664 at gmail.com>
Subject: Re: [LLVMdev] replacing a global variable by a constant
To: Duncan Sands <baldrick at free.fr>
Cc: llvmdev at cs.uiuc.edu
Message-ID:
<CAHbEVmSiWNVhdhxHFbeggHrikw47qWctXfFfBTvbvN158VdXLA at mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
I would delete the Loop. I used the following code.
cout << "begin to delete loop" << endl;
for (Loop::block_iterator bi = L->block_begin(), bi2; bi !=
L->block_end(); bi = bi2) {
bi2 = bi;
bi2++;
BasicBlock * BB = *bi;
for (BasicBlock::iterator ii = BB->begin(), ii2; ii != BB->end();
ii= ii2) {
ii2 = ii;
ii2++;
Instruction *inst = ii;
inst->eraseFromParent();
}
BB->eraseFromParent();
}
But I get the following error:
Use still stuck around after Def is destroyed: %t1 = icmp sle i32 %t0, 9
opt: /home/llvm/src/lib/VMCore/Value.cpp:75: virtual llvm::Value::~Value():
Assertion `use_empty() && "Uses remain when a value is destroyed!"' failed.
0 opt 0x0848e569
Stack dump:
What suggestions do you have for solve this problem?
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Message: 7
Date: Thu, 06 Oct 2011 10:05:18 +0200
From: Duncan Sands <baldrick at free.fr>
Subject: Re: [LLVMdev] replacing a global variable by a constant
To: neda 8664 <neda8664 at gmail.com>
Cc: llvmdev at cs.uiuc.edu
Message-ID: <4E8D613E.6070501 at free.fr>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Hi neda 8664,
> I would delete the Loop. I used the following code.
>
> cout << "begin to delete loop" << endl;
> for (Loop::block_iterator bi = L->block_begin(), bi2; bi != L->block_end();
> bi = bi2) {
> bi2 = bi;
> bi2++;
> BasicBlock * BB = *bi;
> for (BasicBlock::iterator ii = BB->begin(), ii2; ii != BB->end(); ii=
> ii2) {
> ii2 = ii;
> ii2++;
> Instruction *inst = ii;
The instruction may be used by some other instruction outside this basic block.
I suggest that at this point you do:
inst->replaceAllUsesWith(UndefValue::get(inst->getType()));
That way all users of the instruction will use an undefined value instead.
Thus the instruction no longer has any uses so you can freely delete it.
> inst->eraseFromParent();
> }
> BB->eraseFromParent();
Similarly, predecessors of the basic block may still branch to it. Also, the
basic block itself may be used by blockaddress constants. Probably rather
than deleting the basic block it is easier to insert an unreachable instruction
in it and let the standard optimizers delete it.
> }
That said, the simplest thing to do is to use the DeleteDeadBlock routine. It
will take care of deleting the instructions in the basic block for you, and
will also delete the basic block itself. All you have to do is ensure that
the predecessors of the basic block go somewhere else first, which you would
have to arrange in any case.
Even easier is to simply make the loop unreachable then let the usual
optimizers delete it. You can also directly call something like SimplifyCFG
(see Local.h) to have it be deleted.
Ciao, Duncan.
>
> But I get the following error:
>
> Use still stuck around after Def is destroyed: %t1 = icmp sle i32 %t0, 9
> opt: /home/llvm/src/lib/VMCore/Value.cpp:75: virtual llvm::Value::~Value():
> Assertion `use_empty() && "Uses remain when a value is destroyed!"' failed.
> 0 opt 0x0848e569
> Stack dump:
>
>
> What suggestions do you have for solve this problem?
------------------------------
Message: 8
Date: Thu, 06 Oct 2011 14:14:07 +0300
From: Carlos S?nchez de La Lama <carlos.delalama at urjc.es>
Subject: Re: [LLVMdev] VLIW Ports
To: LLVM Dev <llvmdev at cs.uiuc.edu>
Message-ID: <1317899647.25395.40.camel at csanchez-desktop>
Content-Type: text/plain; charset="utf-8"
Hi all,
here is the current (unfinished) version of the VLIW support I
mentioned. It is a patch over svn rev 141176. It includes the
MachineInstrBundle class, and small required changes in a couple of
outside LLVM files.
Also includes a modification to Mips target to simulate a 2-wide VLIW
MIPS. The scheduler is really silly, I did not want to implement a
scheduler, just the bundle class, and the test scheduler is just
provided as an example.
Main thing still missing is to finish the "pack" and "unpack" methods in
the bundle class. Right now it manages operands, both implicit and
explicit, but it should also manage memory references, and update MIB
flags acording to sub-MI flags.
For any question I would be glad to help.
BR
Carlos
On Tue, 2011-09-20 at 16:02 +0200, Carlos S?nchez de La Lama wrote:
> Hi,
>
> > Has anyone attempted the port of LLVM to a VLIW architecture? Is there
> > any publication about it?
>
> I have developed a derivation of MachineInstr class, called
> MachineInstrBundle, which is essnetially a VLIW-style machine
> instruction which can store any MI on each "slot". After the scheduling
> phase has grouped MIs in bundles, it has to call MIB->pack() method,
> which takes operands from the MIs in the "slots" and transfers them to
> the superinstruction. From this point on the bundle is a normal
> machineinstruction which can be processed by other LLVM passes (such as
> register allocation).
>
> The idea was to make a framework on top of which VLIW/ILP scheduling
> could be studies using LLVM. It is not completely finished, but it is
> more or less usable and works with a trivial scheduler in a synthetic
> MIPS-VLIW architecture. Code emission does not work though (yet) so
> bundles have to be unpacked prior to emission.
>
> I was waiting to finish it to send a patch to the list, but if you are
> interested I can send you a patch over svn of my current code.
>
> BR
>
> Carlos
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------------------------------
Message: 9
Date: Thu, 06 Oct 2011 10:02:04 +0000
From: Oliver Schneider <gmane at assarbad.net>
Subject: Re: [LLVMdev] svnsync of llvm tree
To: llvmdev at cs.uiuc.edu
Message-ID: <4E8D7C9C.5080601 at assarbad.net>
Content-Type: text/plain; charset=UTF-8
On 2011-08-29 04:21, Kurt Lidl wrote:
> While I agree bootstrapping a new mirror from scratch is time and
> resource consuming, this can be largely avoided by making a seed
> of the svn tree available. (Basically, I think that looks like
> a compressed tar file of the svn repository.) Or, a svnadmin dump
> of the repo could be made available for the adventurous.
Having the same problem as Kurt, I'd like to second his request for a
seed file. The dump seems the more sensible approach, although the tar
will work as well under most circumstances.
Some insight on how FreeBSD does it, can be found here:
<http://wiki.freebsd.org/SubversionPrimer#Setting_up_a_svnsync_mirror>
Such a seed would have to be updated every now an then, but not too often.
rsync would be another alternative, which I have been using to clone
some repos from SF.net for some time now. They offer this option for
backup purposes.
> I was under the impression that the overhead to synsync a mirror
> of a complete svn repository wasn't too great. svnsync keeps track
> of the last revision in a repo that it has successfully fetched,
> and after that, will only ever request the changes newer than that.
Indeed, it does.
>> However, we have official git mirrors of most of the projects on
>> llvm.org, would using them instead of svnsync be an option for you?
>
> Well, if the authoritative source code control system for all the
> llvm projects is svn, I'd just as soon use svn as the tool at my end.
The git mirrors only contain what's in trunk in the SVN repos.
// Oliver
------------------------------
Message: 10
Date: Thu, 06 Oct 2011 10:02:04 +0000
From: Oliver Schneider <gmane at assarbad.net>
Subject: Re: [LLVMdev] svnsync of llvm tree
To: llvmdev at cs.uiuc.edu
Message-ID: <4E8D7C9C.5080601 at assarbad.net>
Content-Type: text/plain; charset=UTF-8
On 2011-08-29 04:21, Kurt Lidl wrote:
> While I agree bootstrapping a new mirror from scratch is time and
> resource consuming, this can be largely avoided by making a seed
> of the svn tree available. (Basically, I think that looks like
> a compressed tar file of the svn repository.) Or, a svnadmin dump
> of the repo could be made available for the adventurous.
Having the same problem as Kurt, I'd like to second his request for a
seed file. The dump seems the more sensible approach, although the tar
will work as well under most circumstances.
Some insight on how FreeBSD does it, can be found here:
<http://wiki.freebsd.org/SubversionPrimer#Setting_up_a_svnsync_mirror>
Such a seed would have to be updated every now an then, but not too often.
rsync would be another alternative, which I have been using to clone
some repos from SF.net for some time now. They offer this option for
backup purposes.
> I was under the impression that the overhead to synsync a mirror
> of a complete svn repository wasn't too great. svnsync keeps track
> of the last revision in a repo that it has successfully fetched,
> and after that, will only ever request the changes newer than that.
Indeed, it does.
>> However, we have official git mirrors of most of the projects on
>> llvm.org, would using them instead of svnsync be an option for you?
>
> Well, if the authoritative source code control system for all the
> llvm projects is svn, I'd just as soon use svn as the tool at my end.
The git mirrors only contain what's in trunk in the SVN repos.
// Oliver
------------------------------
Message: 11
Date: Thu, 6 Oct 2011 09:32:21 +0000
From: Baggett Jonas <Jonas.Baggett at hefr.ch>
Subject: [LLVMdev] TR : LLVM and VHDL simulation
To: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu>
Message-ID:
<D2D188690F92F64B81201CA7EA90831A01F05446 at HEFRMBX01.sofr.hefr.lan>
Content-Type: text/plain; charset="us-ascii"
Thanks for your answers.
In one year, I am going to have something like a semester project.
The idea I have for this project would be to create (for simulation only) a VHDL front-end to LLVM, compile some VHDL code with the newly created compilator and also with a commercial compilator and simulator and compare the performance of both simulations. I won't have the time to do a full VHDL support, but if I implement at least entities/architectures, concurrent statements, processes, integer and/or real and boolean types, that should be enough to do the comparison. Maybe after the project, I will continue to work on the VHDL front-end. The main point of this project will be to see what LLVM could bring in term of performances and ease of developpement.
This project has still to be accepted, so I am not 100% sure that I will do this project. I also found a tutorial (http://llvm.org/docs/tutorial/) that can help me to familiarize with LLVM before I will do this project (if I will).
Greetings
Jonas
------------------------------
Message: 12
Date: Thu, 06 Oct 2011 09:59:25 -0500
From: greened at obbligato.org (David A. Greene)
Subject: Re: [LLVMdev] TableGen and Greenspun
To: Jakob Stoklund Olesen <jolesen at apple.com>
Cc: llvmdev List <llvmdev at cs.uiuc.edu>
Message-ID: <nng39f65foy.fsf at transit.us.cray.com>
Content-Type: text/plain; charset=us-ascii
Jakob Stoklund Olesen <jolesen at apple.com> writes:
> The TableGen language seems to be growing Lisp macros from two
> different directions.
>
> Che-Liang Chiou added a preprocessor with for loops, and David Greene
> added multidefs.
>
> It seems that some kind of macro facility is needed, perhaps we should
> discuss what it is supposed to look like?
Don't throw the Greenspunning term around unless you really mean it.
The problem I solved via multidefs was this: how does one write a set of
Pat<> patterns in a generic way?
For example, I want to be able to do this:
defm MOVH :
vs1x_fps_binary_vv_node_rmonly<
0x16, "movh", undef, 0,
// rr
[(undef)],
// rm
[(set DSTREGCLASS:$dst,
(DSTTYPE (movlhps SRCREGCLASS:$src1,
(DSTTYPE (bitconvert
(v2f64 (scalar_to_vector
(loadf64 addr:$src2))))))))],
// rr Pat
[],
// rm Pat
[[(DSTTYPE (movlhps SRCREGCLASS:$src1, (load addr:$src2))),
(MNEMONIC SRCREGCLASS:$src1, addr:$src2)],
[(INTDSTTYPE (movlhps SRCREGCLASS:$src1, (load addr:$src2))),
(MNEMONIC SRCREGCLASS:$src1, addr:$src2)]]>;
I need to have the various types substituted and the mnemonic with
appropriate suffixes substituted. I need to have this done for each
Pat<> pattern in the list ("rm Pat" above). To do this TableGen needs
to know something about the top-level defm (the "defm name," if you
will) and something about the types and classes the defm gets
instantiated with.
Therefore, I need some way to process a list of patterns and do
substitutions in the context of a specific defm and all of the classes
it inherits from.
I'm open to another solution but multidef has served its purpose well
and I would need equivalent functionality.
TableGen is missing a lot of functionality but I think it should be
added incrementally rather than rewritten in some grand scheme.
-Dave
------------------------------
Message: 13
Date: Thu, 06 Oct 2011 10:01:49 -0500
From: greened at obbligato.org (David A. Greene)
Subject: Re: [LLVMdev] svnsync of llvm tree
To: Oliver Schneider <gmane at assarbad.net>
Cc: llvmdev at cs.uiuc.edu
Message-ID: <nngy5wy410i.fsf at transit.us.cray.com>
Content-Type: text/plain; charset=us-ascii
Oliver Schneider <gmane at assarbad.net> writes:
>>> However, we have official git mirrors of most of the projects on
>>> llvm.org, would using them instead of svnsync be an option for you?
>>
>> Well, if the authoritative source code control system for all the
>> llvm projects is svn, I'd just as soon use svn as the tool at my end.
> The git mirrors only contain what's in trunk in the SVN repos.
I think it contains branches of several previous releases:
$ git branch -r
llvm-upstream/master
llvm-upstream/release_1
llvm-upstream/release_16
llvm-upstream/release_20
llvm-upstream/release_21
llvm-upstream/release_22
llvm-upstream/release_23
llvm-upstream/release_24
llvm-upstream/release_25
llvm-upstream/release_26
llvm-upstream/release_27
llvm-upstream/release_28
llvm-upstream/release_29
llvm-upstream/svn-tags/RELEASE_1
llvm-upstream/svn-tags/RELEASE_20
llvm-upstream/svn-tags/RELEASE_21
llvm-upstream/svn-tags/RELEASE_22
llvm-upstream/svn-tags/RELEASE_23
llvm-upstream/svn-tags/RELEASE_24
llvm-upstream/svn-tags/RELEASE_25
llvm-upstream/svn-tags/RELEASE_26
llvm-upstream/svn-tags/RELEASE_27
llvm-upstream/svn-tags/RELEASE_28
llvm-upstream/svn-tags/RELEASE_29
It's possible I set that up myself. I can't remember.
-Dave
------------------------------
Message: 14
Date: Thu, 6 Oct 2011 09:19:46 -0600
From: Jeff Fifield <fifield at colorado.edu>
Subject: Re: [LLVMdev] svnsync of llvm tree
To: "David A. Greene" <greened at obbligato.org>
Cc: llvmdev at cs.uiuc.edu
Message-ID:
<CA+5nja+s=ce=LPOkUeum2spJ6gx8xYzGw=et2+htU4JfafH33Q at mail.gmail.com>
Content-Type: text/plain; charset=ISO-8859-1
On Thu, Oct 6, 2011 at 9:01 AM, David A. Greene <greened at obbligato.org> wrote:
> Oliver Schneider <gmane at assarbad.net> writes:
>> The git mirrors only contain what's in trunk in the SVN repos.
>
> I think it contains branches of several previous releases:
>
> $ git branch -r
> ?llvm-upstream/master
> ?llvm-upstream/release_1
> ?llvm-upstream/release_16
> ?llvm-upstream/release_20
> ?llvm-upstream/release_21
> ?llvm-upstream/release_22
> ?llvm-upstream/release_23
> ?llvm-upstream/release_24
> ?llvm-upstream/release_25
> ?llvm-upstream/release_26
> ?llvm-upstream/release_27
> ?llvm-upstream/release_28
> ?llvm-upstream/release_29
> ?llvm-upstream/svn-tags/RELEASE_1
> ?llvm-upstream/svn-tags/RELEASE_20
> ?llvm-upstream/svn-tags/RELEASE_21
> ?llvm-upstream/svn-tags/RELEASE_22
> ?llvm-upstream/svn-tags/RELEASE_23
> ?llvm-upstream/svn-tags/RELEASE_24
> ?llvm-upstream/svn-tags/RELEASE_25
> ?llvm-upstream/svn-tags/RELEASE_26
> ?llvm-upstream/svn-tags/RELEASE_27
> ?llvm-upstream/svn-tags/RELEASE_28
> ?llvm-upstream/svn-tags/RELEASE_29
>
> It's possible I set that up myself. ?I can't remember.
no, you didn't. The git repo contains those branches.
-Jeff
------------------------------
Message: 15
Date: Thu, 6 Oct 2011 11:54:05 -0400
From: Jianzhou Zhao <jianzhou at seas.upenn.edu>
Subject: Re: [LLVMdev] LLVM and VHDL simulation
To: Baggett Jonas <Jonas.Baggett at hefr.ch>, LLVM Developers Mailing
List <llvmdev at cs.uiuc.edu>
Message-ID:
<CALhoTJN=8Y2nuk4O3hGmiF-aFfN3-YE_tfkrrgEjRyyA9eYVfw at mail.gmail.com>
Content-Type: text/plain; charset=ISO-8859-1
On Sun, Oct 2, 2011 at 4:24 PM, Baggett Jonas <Jonas.Baggett at hefr.ch> wrote:
> Hi,
>
> I am wondering if someone knows about a VHDL simulator (maybe still in early developpement) that use LLVM in its compilation process.
> To summarize, VHDL is a hardware description language, which means that VHDL is like any other programming language except that the output of its synthesis is not a list of assembly instructions but a description of a circuit with logical gates. This description is then translated to hardware (which is often done in practice by programming a FPGA).
> In consequence, after being synthetised on hardware, not all the VHDL instructions are meant to be executed serially like it is for assembly instructions but they could also be concurrent.
Does this 'concurrency' mean that we need to figure out
data-independent instructions in VHDL? Although LLVM-IR is written
serially, its SSA form explicitly tells us the data dependency between
temporaries. Then the question is how to map VHDL data types and
program constructors to LLVM, I think this is not trivial.
I just googled a System C-LLVM tool
https://forge.imag.fr/plugins/mediawiki/wiki/pinavm/index.php/Main_Page
which may help?
> VHDL code could also be simulated by a simulator in which case the concurrent instructions are of course executed serially because the VHDL code is compiled in this case to assembly instructions.
> I have no experience with LLVM, but it seems to me that if a VHDL simulator use LLVM for its middleend and backend, it would be hard (if not impossible) to exploit the concurrency of the concerned instructions to do further optimizations.
> I find that the author of GHDL (a free VHDL compiler and simulator that is probably the most mature among the free ones) said once to be interested of modifying GHDL to compile to LLVM (see http://www.ruby-forum.com/topic/155103), but now it doesn't seems that anything concrete was made for this project in this area.
>
> Greetings,
> Jonas
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu ? ? ? ? http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
--
Jianzhou
------------------------------
Message: 16
Date: Thu, 06 Oct 2011 11:46:50 -0500
From: greened at obbligato.org (David A. Greene)
Subject: Re: [LLVMdev] TableGen and Greenspun
To: greened at obbligato.org (David A. Greene)
Cc: Jakob Stoklund Olesen <jolesen at apple.com>, llvmdev List
<llvmdev at cs.uiuc.edu>
Message-ID: <nngipo23w5h.fsf at transit.us.cray.com>
Content-Type: text/plain; charset=us-ascii
greened at obbligato.org (David A. Greene) writes:
> The problem I solved via multidefs was this: how does one write a set of
> Pat<> patterns in a generic way?
>
> For example, I want to be able to do this:
>
> defm MOVH :
> vs1x_fps_binary_vv_node_rmonly<
> 0x16, "movh", undef, 0,
> // rr
> [(undef)],
> // rm
> [(set DSTREGCLASS:$dst,
> (DSTTYPE (movlhps SRCREGCLASS:$src1,
> (DSTTYPE (bitconvert
> (v2f64 (scalar_to_vector
> (loadf64 addr:$src2))))))))],
> // rr Pat
> [],
> // rm Pat
> [[(DSTTYPE (movlhps SRCREGCLASS:$src1, (load addr:$src2))),
> (MNEMONIC SRCREGCLASS:$src1, addr:$src2)],
> [(INTDSTTYPE (movlhps SRCREGCLASS:$src1, (load addr:$src2))),
> (MNEMONIC SRCREGCLASS:$src1, addr:$src2)]]>;
>
> I need to have the various types substituted and the mnemonic with
> appropriate suffixes substituted. I need to have this done for each
> Pat<> pattern in the list ("rm Pat" above). To do this TableGen needs
> to know something about the top-level defm (the "defm name," if you
> will) and something about the types and classes the defm gets
> instantiated with.
>
> Therefore, I need some way to process a list of patterns and do
> substitutions in the context of a specific defm and all of the classes
> it inherits from.
So here's why I think the for loop proposal can't be a preprocessing
phase. Down in the guts of this I fundamentally need to be able to do
this:
multiclass blah<list<int> Values> {
for v = Values {
def DEF#v : base_class<v>;
}
}
Will that work? Is the for loop evaluated after parameter binding?
I like the for loop idea. But it can't be "just" a preprocessing step.
Also, I know I introduced the #..# "pasting" operation but I've found it
to be too limiting. In this example:
(Equivalent TableGen code with a for-loop)
----------------------------------------
multiclass PTX_FLOAT_4OP<string opcstr, SDNode opnode1, SDNode opnode2> {
for nbit = [32, 32, 64, 64],
op_suffix = [r, i, r, i],
op_type = [RegF32, f32imm, RegF64, f64imm],
op_node_type = [RegF32, fpimm, RegF64, fpimm] in {
def rr#op_suffix#nbit
: InstPTX<(outs RegF#nbit:$d),
(ins RegF#nbit:$a, RegF#nbit:$b, #op_type:$c),
!strconcat(opcstr, ".f#nbit\t$d, $a, $b, $c"),
[(set RegF#nbit:$d,
(opnode2 (opnode1 RegF#nbit:$a, RegF#nbit:$b),
#op_node_type:$c))]>;
}
}
what if we instead did this:
(Equivalent TableGen code with a for-loop)
----------------------------------------
multiclass PTX_FLOAT_4OP<string opcstr, SDNode opnode1, SDNode opnode2> {
for nbit = [32, 32, 64, 64],
op_suffix = [r, i, r, i],
op_type = [RegF32, f32imm, RegF64, f64imm],
op_node_type = [RegF32, fpimm, RegF64, fpimm] in {
def !strconcat(!strconcat("rr", !cast<string>(op_suffix)), "nbit")
[...]
}
}
Yes, it's a bit more verbose but also more flexible in what you can do
with iterator values.
-Dave
------------------------------
Message: 17
Date: Thu, 6 Oct 2011 13:48:00 -0300
From: Rafael Baldiati Parizi <parizi.computacao at gmail.com>
Subject: [LLVMdev] How to create arguments CallInst
To: llvmdev at cs.uiuc.edu
Message-ID:
<CALhe0+Gqxppx_04XRbWAr8zVdYd2TE0=2wxNB1y2PPPT3bjkQQ at mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Hello,
I need create a CallInst to this function
define i32 @function(i32 %n, i8 %m){ ... }
I now how get argument's type but I do not know how to create arguments that
meet these types.
For example, if the argument is long, accurate pass CallInst an integer
argument, however, if a Char, Char must pass an argument.
How to get the type of the argument of the function definition and create
the same type to pass the Callinst???
--
*Rafael Parizi*
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Message: 18
Date: Thu, 6 Oct 2011 11:54:25 -0500
From: John Criswell <criswell at illinois.edu>
Subject: Re: [LLVMdev] How to create arguments CallInst
To: Rafael Baldiati Parizi <parizi.computacao at gmail.com>
Cc: llvmdev at cs.uiuc.edu
Message-ID: <4E8DDD41.6020304 at illinois.edu>
Content-Type: text/plain; charset="iso-8859-1"
On 10/6/11 11:48 AM, Rafael Baldiati Parizi wrote:
> Hello,
> I need create a CallInst to this function
>
> define i32 @function(i32 %n, i8 %m){ ... }
>
> I now how get argument's type but I do not know how to create
> arguments that meet these types.
> For example, if the argument is long, accurate pass CallInst an
> integer argument, however, if a Char, Char must pass an argument.
> How to get the type of the argument of the function definition and
> create the same type to pass the Callinst???
If you want to pass a value to a function that doesn't match the type,
you will need to insert a cast instruction to cast the value to the
correct type. Which cast instruction you insert will depend on the
value's type and the type you want it to be.
SAFECode has a utility function castTo() that takes a Value * and a
desired Type * and inserts a cast instruction if Value * is not of the
desired type. It's designed to minimize the number of cast instructions
it inserts so that the resulting LLVM IR is more readable for debugging:
http://llvm.org/viewvc/llvm-project/safecode/trunk/include/safecode/Utility.h?view=markup
-- John T.
>
>
> --
> */Rafael Parizi/*
>
>
>
>
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
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