[LLVMdev] VLIW Ports

Carlos Sánchez de La Lama carlos.delalama at urjc.es
Thu Oct 6 04:14:07 PDT 2011

Hi all,

here is the current (unfinished) version of the VLIW support I
mentioned. It is a patch over svn rev 141176. It includes the
MachineInstrBundle class, and small required changes in a couple of
outside LLVM files.

Also includes a modification to Mips target to simulate a 2-wide VLIW
MIPS. The scheduler is really silly, I did not want to implement a
scheduler, just the bundle class, and the test scheduler is just
provided as an example.

Main thing still missing is to finish the "pack" and "unpack" methods in
the bundle class. Right now it manages operands, both implicit and
explicit, but it should also manage memory references, and update MIB
flags acording to sub-MI flags.

For any question I would be glad to help.



On Tue, 2011-09-20 at 16:02 +0200, Carlos Sánchez de La Lama wrote:
> Hi,
> > Has anyone attempted the port of LLVM to a VLIW architecture?  Is there 
> > any publication about it?
> I have developed a derivation of MachineInstr class, called
> MachineInstrBundle, which is essnetially a VLIW-style machine
> instruction which can store any MI on each "slot". After the scheduling
> phase has grouped MIs in bundles, it has to call MIB->pack() method,
> which takes operands from the MIs in the "slots" and transfers them to
> the superinstruction. From this point on the bundle is a normal
> machineinstruction which can be processed by other LLVM passes (such as
> register allocation).
> The idea was to make a framework on top of which VLIW/ILP scheduling
> could be studies using LLVM. It is not completely finished, but it is
> more or less usable and works with a trivial scheduler in a synthetic
> MIPS-VLIW architecture. Code emission does not work though (yet) so
> bundles have to be unpacked prior to emission.
> I was waiting to finish it to send a patch to the list, but if you are
> interested I can send you a patch over svn of my current code.
> BR
> Carlos

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