[LLVMdev] ARMv5 Thumb Support Hacking Session (and other topics)

[Jim Grosbach]

Hi Joe,

Not sure yet if I'll be able to make the hacking session or not, but either way, feel free to look me up at any time during the conference and I'd be happy to talk about the arm backend.

Jim


On Nov 16, 2011, at 7:24 AM, Joe Abbey <jabbey at arxan.com> wrote:

> I'll be attending the hacking session with the intent of understanding what needs to be done to improve ARMv5 Thumb support.  With any amount of luck, we can start pounding away at the support.
> 
> My initial understanding from the release notes are that http://llvm.org/bugs/show_bug.cgi?id=1388 has to be fixed first.
> 
> Evan Cheng writes this in 2007: 
> The proper fix is to model CC as explicit register(s). Then you can fix the
> scheduler and register allocator, 
> i.e. any machine instruction level module that insert move, load, store ops, to
> insert instructions at the 
> right spot to avoid clobbering the CC registers. Not only is it useful for this
> bug, it also makes it easier to 
> implement a pass that optimize away cmp / test, etc.
> 
> Perhaps it's ok to just add instruction properties that tells us whether a
> instruction sets / reads CC. It's 
> hard to say.
> I presume the bug status is accurate, but if anyone has any historical perspective (since this is 4 years stale) to offer that would be much obliged.  It seems like http://llvm.org/bugs/show_bug.cgi?id=1401 indicates that X86 does this well enough, but sure would be handy on ARM.
> 
> There's a couple other areas I'm very interested in better understanding.  For instance, I've read a couple papers on stack slot coloring, and I see that there's some work done already in the CodeGen/StackSlotColoring.cpp.  I'd love to dig deeper into this topic.  This project is still listed as open.
> 
> Implement 'stack slot coloring' to allocate two frame indexes to the same stack offset if their live ranges don't overlap. This can reuse a bunch of analysis machinery from LiveIntervals. Making the stack smaller is good for cache use and very important on targets where loads have limited displacement like ppc, thumb, mips, sparc, etc. This should be done as a pass before prolog epilog insertion. This is now done for register allocator temporaries, but not for allocas.
> 
> Finally there's the ARMConstantIslandPass.  Conceptually I get the idea, islands water yes yes... place constants close to the code.  I'd just like to whiteboard it with someone so I can have a better understanding!  Maybe we could learn something together.
> 
> Hope to see you there!  I'm a very fast learner, maybe I can help you with your area of interest.
> 
> Thanks!
> 
> Joe Abbey
> Software Architect
> Arxan Technologies, Inc.
> 1305 Cumberland Ave, Ste 215
> West Lafayette, IN 47906
> jabbey at arxan.com
> www.arxan.com
> 
> 
> 
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