[LLVMdev] predicates and conditional execution

[Jim Grosbach]

On May 24, 2011, at 12:02 AM, roy rosen wrote:

> Hi,
> 
> I was wondering if LLVM supports predicates and conditional execution.
> Something like we have in IA64.
> There is a register class of predicates and then every instruction may
> be predicated by a register from this class.
> For example:
> 
> cmp_less p, x, y // p is a predicate which gets the result of x < y
> p add x, x, 2 // if p then do the add instruction
> 
> Is there support in LLVM to something like that?
> Which architecture can show a good example for the implementation of that?


Hi Roy,

LLVM has support for predication. You may want to look at the ARM backend. It has predication for most instructions, and the compiler tries hard to make effective use of the feature. In the target independent code, you'll also want to examine the IfConversion pass, which does most of the heavy lifting for actually making the transformations between explicit CFG and predicated instructions.

-Jim