[LLVMdev] backend question

[Ken Dyck]

On Tue, Mar 8, 2011 at 5:14 AM, Jacques Van Damme
<Jacques.VanDamme at synopsys.com> wrote:
> I am writing a backend for an architecture that has only 16-bit word
> addressing (No byte addresses ever.  All data are always 16-bit).
>
> How can I specify this in the backend?

In short, you can't. Word-addressable memory is not currently
supported in LLVM (or Clang, for that matter).

> As an example, consider the following instruction:
>
>    %arrayidx = getelementptr [129 x i16]* @flags, i16 0, i16 %i.043
>
> When I generate assembler code, this now results in %i.043 being multiplied
> by 2 in the address calculation which result in a shift being emitted.
>
> How can I avoid this?

You'll need to modify LLVM (and Clang, if that's what you are using as
your front end).

If you are interested, I can send you a patch of the changes that I
made to the 2.8 release for a backend that targets a 24-bit
word-addressable DSP, but it is quite rough and it includes changes in
which you probably aren't interested (support for non-power-of-2
integer sizes and some other bug fixes).

FWIW, I'm working (albeit at a glacial pace) on improving support for
word-addressable memory in Clang, with the plan of eventually working
my way down to LLVM. But I expect it will be a while until it is ready
for production use.

-Ken