[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs

[Damjan Marion]

On Jun 22, 2011, at 3:16 PM, Renato Golin wrote:

> On 22 June 2011 11:49, Damjan Marion <damjan.marion at gmail.com> wrote:
>> # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c
> 
> Even though you specified cpu as arm9, it's probably generating
> generic ARM IR (use -emit-llvm -S and see), which defaults to ARM
> instructions.
> 
> If you want thumb, use triple = thumb-unknown-freebsd, but still, that
> will have problems. You can do it in two steps (clang -> IR, llc ->
> ASM) and specify all options on both steps, or wait until the clang
> patch for cross-compilation is reviewed and applied.


Hi Renato,

I dont want to generate Thumb code, actually i missed in my previous email that "rrx r0,r0" is both ARM and thumb-2 instruction, but only defined in ARMv7.

llvm produces "rrx r0,r0" mnemonics for ARMv5 targets, however ARM Architecture Reference Manual for ARMv5 doesn't know about that mnemonics. There is equivalent mnemonics on ARMv5: "mov r0,r0, rrx"

both "rrx r0,r0" and "mov r0, r0, rrx" result in same opcode: 0xe1a00060.

Problem is that in case when old binutils are used (in my case freebsd is using old one due to license upgrade to GPLv3) AS doesn't understand new mnemonics and fails.

Can we change to old mnemonic at least when ARMv4 and ARMv5 code is generated?

Thanks,