[LLVMdev] code generation for ARM

D S Khudia daya.khudia at gmail.com
Tue Jun 14 10:53:13 PDT 2011


Thanks for your reply.

I have a normal (../configure --enable-profiling --disable-optimized
--enable-assertions) llvm debug+profile+assert build.
I am generating llvm-bitcode using following commands.

llvm-gcc -DLINUX_i386 -DSPEC_CPU2000 -O3 -emit-llvm 186.crafty/src/valid.c
-c -o 186.crafty/src/valid.bc
---

llvm-link 186.crafty/src/*.bc -o 186.crafty/186.crafty.rel.bc

and finally:

llc -march=arm 186.crafty/186.crafty.rel.bc -o 186.crafty/186.crafty.m5arm.s

And there is not inline assembly in my C code.

Should I somehow specify arm related options to llvm while building llvm?

Thanks
Daya

On Tue, Jun 14, 2011 at 1:34 PM, Anton Korobeynikov <anton at korobeynikov.info
> wrote:

> Hello
>
> > Command => llc -march=arm 186.crafty/186.crafty.rel.bc -o
> > 186.crafty/186.crafty.m5arm.s
> > Error =>  LLVM ERROR: Couldn't allocate output reg for constraint '{cx}'!
> >
> > Have anyone seen this before?
> It seems you're feeding x86-specific LLVM IR to arm backend. Please
> don't do that.
>
> --
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110614/0af29cc4/attachment.html>


More information about the llvm-dev mailing list