[LLVMdev] code generation removes duplicated instructions
D S Khudia
daya.khudia at gmail.com
Wed Jul 6 07:57:42 PDT 2011
The code snippet pasted in the previous email are generated at -O0 with llc.
Since I am inserting a new basic block (contains printf statement and
program exit) which is jumped upon based on the result of
the comparison, the compiler cannot/shouldnot optimize that away by means of
DCE or anything else.
The same kind of stuff is happening for the following duplication.
bb6.split: ; preds = %bb6
%33 = load i32* %32, align 4
%34 = load i32* %i, align 4
%HV4_3 = sub nsw i32 %34, %33
%35 = sub nsw i32 %34, %33
%HV4_2 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %HV4_3
%36 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %35
%LDCmp6 = icmp ne i32* %36, %HV4_2
br i1 %LDCmp6, label %relExit, label %bb6.split.split
In the above example even the operands are not same and I guess compiler
cannot be that smart at -O0. I sense something is wrong with the code
generation for ARM.
What other way do you suggest for duplicating since you mentioned I
shouldn't rely on duplication the way I am doing it?
Thanks a lot. I really appreciate your help.
On Wed, Jul 6, 2011 at 10:27 AM, Renato Golin <renato.golin at arm.com> wrote:
> On 6 July 2011 14:55, D S Khudia <daya.khudia at gmail.com> wrote:
> > The following is an example code generation for arm and x86 for a same IR
> > BB. In the x86 code I can see that the same computation is done twice and
> > result is stored in two different registers and then these two different
> > registers are used for comparision.
> Yes, but you shouldn't rely on it, since the compiler is free to
> optimize that away.
> > By the way I am duplicating instruction
> > and inserting comparison to catch transient errors.
> I thought so. Try running llc with -O0 or disable specific
> optimizations (like dead-code elimination) to keep your comparisons
> But since the two values are identical, it's possible that even so,
> both will live in the same register.
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