[LLVMdev] Possible CellSPU Bug?

[David A. Greene]

Kalle Raiskila <kalle.raiskila at nokia.com> writes:

> Looks like a bug to me. xshw (extend signed half-word(16bits) to
> word(32bits)) takes a v8i16 and produces a v4i32. This has likely gone
> unnoticed as there is only one type of vector register class (i.e.
> VECREG) that is used for all vectors.
>
> Nice catch :) Are there more of these?

I don't know.  I stopped implementing the stricter typechecking when I
saw this.  I wanted to make sure there wasn't some official trickery
going on.  :)

                           -Dave