[LLVMdev] Adding a new instruction to Alpha ISA

[Bill Wendling]

On Jan 12, 2011, at 7:49 AM, Giang Hoang wrote:

> Hi,
> 
> I want to add an extra instruction to the Alpha ISA.  This is not a new operation; it is just an addition with a lower latency, let's call it fast-add.  Could you give me advice on what's an easy and clean approach to this?  I am thinking of adding an extra instruction to the LLVM IR to represent this fast-add operation (I want to make the decision of using either the normal addition or fast addition during loop unroll pass, which happens before code generation; so I think I need an extra IR instruction).  The LLVM documentation warns against adding new IR instruction unless it is absolutely necessary, so I would like to ask to make sure.
> 
Hi Giang,

If you need to have special instructions like this, the best way is to create an intrinsic that represents the operation. For instance, LLVM has the "llvm.smul.with.overflow" intrinsic, which represents a normal (signed) multiply instruction, but is specially lowered to check for overflow.

-bw


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