[LLVMdev] Xilinx zynq-7000 (7030) as a Gallium3D LLVM FPGA target

[Luke Kenneth Casson Leighton]

On Sun, Aug 21, 2011 at 12:48 AM, Nick Lewycky <nicholas at mxc.ca> wrote:

> The way in which Gallium3D targets LLVM, is that it waits until it receives
> the shader program from the application, then compiles that down to LLVM IR.
> That's too late to start synthesizing hardware (unless you're planning to
> ship an FPGA as the graphics card, in which case reprogramming is still too
> slow, and it'll be too expensive).

 nick.... the Zynq-7000 series of Dual-Core Cortex A9 800mhz 28nm CPUs
have an on-board Series 7 Artix-7 or Kinect-7 FPGA (depending on the
Zynq range).  and that's on the same silicon IC :)  so, price is not
an object any more [assuming reasonable volume].

 here's the eetimes article which mentions that the low-end version of
the 7000 series will be under $USD 15 in mass-volume:
 http://www.eetimes.com/electronics-news/4213637/Xilinx-provides-first-product-details-for-EPP-ARM-based-devices

 so - does that change things at all? :)

 i assumed that it would be possible to push other sections of the
gallium3d code through the LLVM wringer (so to speak).  not just the
shader program.  i've seen papers for example - someone won 3rd prize
from a competition by xilinx, he was a Seoul University student,
managed to implement parts of OpenGL ES 1.1 in an FPGA, by porting
MesaGL to it.  got fair performance, too.  i always wondered what
happened to his code, and if he would be required to comply with the
GPL / LGPL...

 anyway, yes: what's possible, and where can people find out more
about how gallium3d uses LLVM?  and (for those people not familiar
with 3D), why is the shader program not "static" i.e. why is a
compiler needed at runtime at _all_? (if there's an answer already
somewhere on a wiki, already, that'd be great).

 and: would moving this compiler onto the FPGA (so that it interprets
the shader program), making it an interpreter instead, be a viable
option?  just throwing ideas out, here. btw i'm familiar with the
dynamic architecture of 3D engines, but many people who might be
reading this (from the archives) are not.  i've seen the hardware
block diagram for the PowerVR SGX engine, for example and it's...
interesting, to say the least :)

 l.