[LLVMdev] Tying an instruction to a specific set of registers

[Villmow, Micah]

Jim, 
Thanks for the hints. Does LLVM allow allocation of the same register across register classes?

For example, in the ARM backend, can an instruction write to R0 when it is part of register class tGPR, but then use R0 in the next instruction as a source register from the rGPR class?

If LLVM can do this, then this will work.

Micah

> -----Original Message-----
> From: Jim Grosbach [mailto:grosbach at apple.com]
> Sent: Tuesday, August 16, 2011 9:33 AM
> To: Villmow, Micah
> Cc: llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] Tying an instruction to a specific set of
> registers
> 
> Hi Micah,
> 
> You can just create a new register class that only contains the
> registers you want and use that for the instruction. The set theoretic
> operators for register class definition make this very easy. See the
> ARM backend definitions of GPRnopc, rGPR, etc.. for examples.
> 
> -Jim
> 
> On Aug 16, 2011, at 9:18 AM, Villmow, Micah wrote:
> 
> > Is there a way in tablegen to specify that a certain instruction can
> only be allocated with a certain subset of a register class?
> >
> > Thanks,
> > Micah
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