[LLVMdev] doubts about Instruction Selection and Scheduling

Lucas Silva landir at gmail.com
Fri Apr 8 11:03:18 PDT 2011


I'm working on the text of my Master's Thesis and I have some doubts:

1. What algorithm is used in Selection Instruction ? What is the input ?
2. Where is described how the variations of List Scheduling work, in
-pre-RA-sched phase ?

-pre-RA-sched                           - Instruction schedulers
available (before register allocation):
    =source                               -   Similar to list-burr but
schedules in source order when possible
    =list-tdrr                            -   Top-down register
reduction list scheduling
    =list-burr                            -   Bottom-up register
reduction list scheduling
    =list-td                              -   Top-down list scheduler
    =fast                                 -   Fast suboptimal list scheduling
    =default                              -   Best scheduler for the target

3. What is algorithm executed in -post-RA-scheduler - Enable
scheduling after register allocation ?

Lucas da Costa Silva

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