[LLVMdev] [PATCH] OpenCL half support

Peter Lawrence peterl95124 at sbcglobal.net
Mon Apr 4 09:23:24 PDT 2011


Chihong,
                  I notice that IEEE-754-2008 does in fact define a  
16-bit floating point standard now,
does your processor conform to that standard, if so there should be  
no objection to adding fp16 to LLVM
and you should have no problem using it, at least that's what I think  
Chris is trying to say (?).


IEEE-754-2008  fp16:     1-bit sign,    5-bit exponent,   10-bit  
fraction

largest  ~~ 2^16  (65504),   smallest ~~ 2^-14   (0.000,061).


uses the same exponent interpretation as other formats
0 --> +/-zero or denorm,    MAX  -->  +/-infinity or not-a-number,

and (I presume) expects IEEE round-to-nearest-even to be the default  
rounding mode,


-Peter Lawrence.



On Mar 22, 2011, at 1:23 PM, llvmdev-request at cs.uiuc.edu wrote:

> On Mar 21, 2011, at 1:59 PM, Zhang, Chihong wrote:
>
>> Hi Chris,
>>
>> It is important for embedded/mobile computation to have efficient  
>> fp16 support, otherwise those users will suffer from the merging  
>> problem with their local LLVM with native fp16 type they add  
>> (locally). So we should either add full fp16 support as a basic  
>> floating point type or enhance the LLVM infrastructure to make  
>> floating point type as scalable as int type.
>
> As I've said several times now :), I'm ok with having fp16 as a  
> native LLVM type so long as there is hardware that implements fp16  
> arithmetic operations like add and sub with correct fp16 rounding etc.
>
> -Chris
>
>>
>>
>> -Chihong

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110404/e49fce34/attachment.html>


More information about the llvm-dev mailing list