[LLVMdev] Explicit register usage in LLVM assembly

Samuel Crow samuraileumas at yahoo.com
Sat Apr 2 13:51:17 PDT 2011

Hello Yiannis,

The answer to your question is "no" or at least "not without getting your hands 
really, really dirty".  The intermediate representation of code is entirely 
processor agnostic or tries to be.  Specifying something specific to just one 
processor is made impossible on purpose to prevent people from making 
system-specific code that would only work on one LLVM Backend.  If you want your 
AMD64 processor to generate different code, you'll have to modify the AMD64 
backend of LLVM and give %r15 a different register classification.  Doing this 
will probably require some proficiency with TableGen (which I'm not so familiar 
with yet) and require that changes be made to all of the other processor 
specifications as well that you plan on using with your compiler.  This would 
probably require a fork of the LLVM project altogether and should not be 
considered lightly.

The reason I brought up about ABIs of operating systems earlier is that that is 
the only time LLVM knows or even cares what register goes to what.  It is 
defined by the calling conventions of function calls.  I'm certain that the 
subject of "pegging" a register to a variable in a compiler came up before in a 
previous discussion but the closest my Google searches revealed was this one: 

This begs the questions:  Are you trying to make a compiler only for AMD64? 
 What operating systems do you plan on supporting with your compiler?  Do you 
know that LLVM is deliberately maintained as a cross-platform framework for many 
operating systems and processors?  What exactly are you trying to do that 
requires such system-specific knowledge other than support a specific operating 

Maybe somebody else who is on the team can give a more specific answer than what 
I gave.

I hope this helps,

----- Original Message ----
> From: Yiannis Tsiouris <yiannis.tsiouris at gmail.com>
> To: Samuel Crow <samuraileumas at yahoo.com>
> Cc: llvmdev at cs.uiuc.edu; Chris Stavrakakis <hydralisk.r at gmail.com>
> Sent: Sat, April 2, 2011 2:46:15 PM
> Subject: Re: [LLVMdev] Explicit register usage in LLVM assembly

> Hello Sam,
>   I am not sure i made myself clear about what i want. I was wondering
> if there
> is a way to communicate to LLVM's register allocator and define which
> registers are pre-coloured and should not be used for allocation.
> ~y.
> On 04/02/2011 06:26 PM, Samuel Crow wrote:
> > Hello  Yiannis,
> >
> > You could write a custom backend that doesn't allocate  %r15 for general 
> >  The normal way to do this is to set up a  custom calling convention for all 

> > functions that keeps a sentinel in  %r15 so that it always holds the 
> >  This is how new  operating systems are supported with custom ABIs.  The only 
> >  problem is that you cannot be assured that %r15 stays put between function 
> > such as for an interrupt.
> >
> > If you had asked "Is there  another EASY way to force explicit register 
> > the answer would  have been "No."
> >
> >
> > --Sam Crow
> >
> >
> > -----  Original Message ----
> >  
> >> From: Yiannis Tsiouris <yiannis.tsiouris at gmail.com>
> >>  To: llvmdev at cs.uiuc.edu
> >> Cc: Chris  Stavrakakis <hydralisk.r at gmail.com>
> >>  Sent: Sat, April 2, 2011 9:39:13 AM
> >> Subject: [LLVMdev] Explicit  register usage in LLVM assembly
> >>
> >> Hello!
> >>       Is there a way to force explicit register usage (e.g.  %r15  in amd64 

> >> architecture) in
> >> LLVM assembly code? I was  proposed in  #llvm channel at irc.oftc.net to 
> >> use  inline
> >> assembly but i find it rather impractical in my case.  Is  there any other 
> >> way?
> >>
> >>  Thanx,
> >> ~y.
> >>    


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