[LLVMdev] GSoC 2011: Fast JIT Code Generation for x86-64

Joshua Warner joshuawarner32 at gmail.com
Fri Apr 1 08:06:07 PDT 2011

Hi Viktor,

I think this is a great idea overall!  This problem is something that has *
almost* turned me away from LLVM several times now.

I'm by no means an influential member of the community (and hence have no
real say in GSoC projects), but I do have a few comments.

> I plan to implement a two-pass (almost) linear code generator
> specifically for x86-64 that

>  - performs analyses (e.g. live-range analysis) on LLVM-IR in the
>   first pass and

I assume this is for collecting information for register allocation?  For
fast code generation, I would go with a local, bottom-up, linear register
allocator, which shouldn't require an explicit live-range analysis pass.  It
only needs to know liveness information within a single block (mostly),
which should be easier and faster to compute on-demand instead of in an
analysis pass.

>  - then generates x86-64 instructions directly from IR in a second
>   pass that writes to the executable memory (e.g. in
>   X86CodeEmitter.cpp),

It sounds as if you are intending on mostly hand-writing the code generation
part.  If this is the case, I would suggest that it would be significantly
more valuable to generate it from the *.td files instead.  That way, it
should be a lot easier to port to other architectures.

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