[LLVMdev] GCCBuiltin and Intrinsic Mapping

Eli Friedman eli.friedman at gmail.com
Sun Sep 12 15:45:34 PDT 2010

On Sun, Sep 12, 2010 at 3:25 PM, David Greene <dag at cray.com> wrote:
> I've run into an issue specifying intrinsics for AVX.
> Right now one can use GCCBuiltin to get automatic CBE (and other)
> support for emitting intrinsics as gcc builtins.  It looks like
> this:
>  def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
>              Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty,
>                         llvm_v2f64_ty], [IntrNoMem]>;
> AVX has 128-bit instructions that work exactly like SSE instructions
> except they have non-destructive operands.  gcc defines intrinsics for
> 256-bit operations but does not define special intrinsics for 128-bit
> AVX instructions.  So one has to use the SSE intrinsics:
>   def int_x86_avx_vhadd_pd_xmm : GCCBuiltin<"__builtin_ia32_haddpd">,
>              Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty],
>                        [IntrNoMem]>;
> Unfortunately, this doesn't work:
> /ptmp/dag/universal_build/merge/developer/DEFAULT/llvm/tblgen: Intrinsic 'int_x86_sse3_hadd_pd': duplicate GCC builtin name!
> Apparently it's not possible to define two different LLVM intrinsics
> that map to the same GCCBuiltin.  Is this a known limitation?  How
> complicated would it be to lift this restriction?

int_x86_avx_vhadd_pd_xmm doesn't exist on trunk.  Why does it exist on
your branch if the semantics are exactly equivalent to
int_x86_sse3_hadd_pd?  The register allocator can handle converting to
three-address form if the target provides the appropriate hooks.


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