[LLVMdev] Prevent instruction elimination

Xinfinity xinfinity_a at yahoo.com
Tue Oct 26 01:02:36 PDT 2010


Thank you, Duncan. I thought about the instrinsics for debugging, but as
mentioned on the llvm blog, they might influence the optimizers: "Note that
intrinsics themselves are not considered metadata, so they can affect code
generation etc." That is why I was searching for an instruction that doesn't
do anything, but carries metadata.

I want to let the optimizers finish their work, and then to analyze parts of
the code, delimited by my metadata. So, the next approach is, instead of
using metadata as barriers to mark the scope of my pragma, to actually mark
all the instructions inside its scope with the metadata, as suggested by
Devang.

Thank you for the ideas.
Alexandra



Duncan Sands wrote:
> 
> Hi Alexandra,
> 
>> The empty inline asm crossed my mind as well, but LLVM handles inline
>> assemblies as calls. This would lead to a dependence if it is inside of a
>> loop, right? And this means a considerable impact on the optimizers.
>> Is it possible to avoid it?
> 
> if a statement has no side-effects then the optimizers will remove it.
> Thus you are obliged to have a statement with side-effects.  This same
> problem occurred with the debug info intrinsics, and the chosen solution
> was to teach all the optimizers that these intrinsics didn't actually do
> anything (but shouldn't be removed).
> 
> I think you should seek a different design.  What are you really trying
> to do?
> 
> Ciao,
> 
> Duncan.
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> 
> 

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