[LLVMdev] Question About Target Dependent Optimization

[Jakob Stoklund Olesen]

On Nov 28, 2010, at 8:29 PM, Isaac Asay wrote:
> 
> I am continuing to look over the code in the ARMLoadStoreOptimizer.cpp file, but I was wondering if you had a specific suggestion or a documentation resource that I could use to perform this instruction rearrangement in an LLVM idiomatic way. Using my algorithm, I already know where I can move MachineInstrs without effecting program correctness, but I don't know how I can reorder the MachineInstrs while maintaining all the associated live-range information. 

After register allocation is complete, liveness information is kept in the live-in lists on basic blocks, and kill flags on register operands.

Simply put, a register is live from a <def> operand to a <use,kill> operand. It must not be used when it isn't live.

The rules get tricky when sub-registers are involved.

Your best bet for documentation is to read MachineVerifier.cpp and perhaps RegisterScavenging.cpp.

If you are rearranging instructions, you must make sure that any kill flags are moved to the last instruction using a register.

/jakob