[LLVMdev] hazard recognizers for scheduling on x86?

Sergey Yakoushkin sergey.yakoushkin at gmail.com
Sun Mar 21 08:04:27 PDT 2010

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Hi,

Are there any plans (ongoing works) to implement hazards recognizers
for in-order x86 processors (e.g. Atom)?

Regards,
Sergey Yakoushkin

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