[LLVMdev] Instruction does not dominate all uses ???

John Criswell criswell at uiuc.edu
Tue Jun 22 23:37:36 PDT 2010

Chayan Sarkar wrote:
> Hi,
> I am trying to write a small pass. In my pass, I have inserted some
> instruction and used that in another. But, during OPT it is  showing
> "Instruction does not dominate all uses" like following -
> %b.1 = bitcast i32 4 to i32                     ; <i32> [#uses=8]  %11
> = add i32 %a.1, %b.1                        ; <i32>
> [#uses=1]Instruction does not dominate all uses!
> Any idea, what is wrong with this?

Not to be snarky, but the problem is that the definition of b.1 does not 
dominate the use of b.1 in the add instruction.

This may be due to two reasons:

1) The instructions are in the same basic block, but they're in the 
wrong order.  The definition of b.1 follows the use of it in the add 
instruction.  If this is the case, you simply need to make sure your 
transform orders the instructions correctly within the basic block.

2) The instructions are in different basic blocks.  The definition of 
b.1 is in a block that does not dominate the add instruction.  You have 
either added b.1 to the wrong basic block, or you have not considered 
the possibility that the basic block to which b.1 belongs may not always 
be executed before the basic block to which the add instruction belongs.

In case you don't know what domination means in this context, a basic 
block A dominates a basic block B if all paths from the entry basic 
block of the function to basic block B pass through basic block A.  
Informally, if basic block B has executed, we know that basic block A 
has already been executed at least once, so all of the SSA definitions 
within it are available for use.

-- John T.

> Regards,
> Chayan
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