[LLVMdev] question on instruction selection

Nuno Lopes nunoplopes at sapo.pt
Tue Jan 26 15:16:28 PST 2010

Many thanks for your reply, Dan!

>> The "how to write a backend" documents are relevant. As are existing
>> targets. The comments on the opcodes in
>> include/CodeGen/SelectionDAGNodes.h are fairly descriptive as well.

Ah, I see. There's actually much more documentation than I though :) Thanks 
for the pointers.

>> I'm also wondering what would be the possible improvement of the approach
>> presented last Friday at POPL
>> (http://portal.acm.org/citation.cfm?doid=1706299.1706346 or
>> http://www.eecs.tufts.edu/~dias/gentileset.pdf) for LLVM. Any insight? 
>> The
>> approach seems similar to what gcc does or did at least (IR->RTL->ASM), 
>> so
>> I'm not entirely sure there would be something to gain here for LLVM. It
>> would be nice to generate the selection dag from LLVM IR automatically,
>> though.
> What are you looking to do?

For now, I'm just trying to understand what's the main contribution of this 
paper towards simplifying the retargeting of a compiler. Don't get me wrong; 
I do not want to bash the paper; I just feel that something is escaping me. 
The approach proposed seems to be fairly similar to what gcc and LLVM do. 
What makes me wondering is why their algorithm needs heavy reasoning to do 
semantic equivalence checking, while gcc & LLVM only need simple pattern 
matching. That's why I've been scratching my head the whole day :)
Do you have any insight that can enlighten me, please?

Thank you,

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