[LLVMdev] Any extend
gac43 at cam.ac.uk
Mon Jan 25 09:22:43 PST 2010
I'm building a backend for a 64-bit target based on the existing Mips 32
one and I've come up against a problem with 32-bit loads. If you load a
32-bit value into a register this needs extending to fit into a native
64-bit register. The initial selection DAG acomplishes this using an
any_extend node, which isn't handled later on by any instruction
selector and thus LLVM can't produce the target code.
Now I could just handle an any_extend load, however if you load a 8-bit
or 16-bit value the initial selection DAG uses a sign_extend (or
zero_extend) node to turn it into a native 64-bit type and I would like
the same behaviour for 32-bit loads.
So my questions are:
1) What causes the Initial selection DAG code to choose an any_extend
over a sign_extend (or zero_extend)?
2) What does any_extend actually signify? Presumably this indicates
that either a sign extend or zero extend will suffice.
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