[LLVMdev] Cache optimizations and data layout

[dhruv choudhary]

Hello,

I am new to LLVM. I am using an x86 code generator. I need to write a few
passes based on cache blocks and data layout information. Does LLVM provide
a way for me to see the data layout and analyze what are the cache blocks?
If not is it possible to implement the same in the current framework?

Thank You

Dhruv Choudhary

-- 
School of Electrical and Computer Engineering
Georgia Institute of Technology
(M)  +1 770 827 9264

Personal Email : choudharydhruv at gmail.com
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