[LLVMdev] how to define a 24-bits register class

ether zhhb etherzhhb at gmail.com
Fri Nov 13 06:45:40 PST 2009


hi every one,

i have a very strange cpu that have 24-bits reigsters, but i cant see
i24 in machine value type? and if defining it as MVT others will be
ok?


thank you very much



More information about the llvm-dev mailing list