[LLVMdev] RFC: AVX Pattern Specification [LONG]

David Greene dag at cray.com
Fri May 1 14:59:20 PDT 2009

On Friday 01 May 2009 15:05, Stefanus Du Toit wrote:
> Hi David,
> On 30-Apr-09, at 6:59 PM, David Greene wrote:
> > This is not scalable.
> >
> > So what I've done is a little experiment to see if I can unify all
> > SSE and AVX
> > SIMD instructions under one framework.  I'll leave MMX and 3dNow
> > alone since
> > they're oddballs and hardly anyone uses them.
> I don't want to unnecessarily expand your scope, but while you're
> doing this, it might make sense to keep in mind the new Larrabee
> instructions as well. They operate on 512-bit registers, and there's a
> (slightly indirect) reference available here:
> http://software.intel.com/en-us/articles/prototype-primitives-guide/
> I'm not suggesting adding these now, just that they might be
> interesting to keep in mind while you're doing this work.

Oh, I'm definitely keeping Larrabee in mind.  I've looked at the primitives 
library and also the Dr. Dobb's article on LRBni:


I'm designing all of this so it should be relatively easy to plug-in the 
non-mask/swizzle variants of the Larrabee instructions.  Masks and swizzles
will require new patterns.

I haven't seen a Larrabee ISA manual yet.  My hope is that the opcodes and 
formats for SSE-like instructions will be the same (e.g. a 512-bit ADD will 
still be 0x58).  I think that's a safe assumption.  But who knows?  Maybe
their graphics guys don't talk to their CPU guys.  If things are radically
different, we won't be able to re-use as much.  But it should still be better
than what we have now.

Also, Larrabee is a great motivator for direct mask/predicate support in LLVM.  
Anyone want to re-engage in that discussion?


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