[LLVMdev] atomic operations for ARM

[Robert Schuster]

Hi,
I have reworked my previous example and got something which is accepted
by tblgen:

let isCall = 1,
  Defs = [R0, R1, R2, R3, R12, LR,
          D0, D1, D2, D3, D4, D5, D6, D7, CPSR] in {

def ARM_ATOMIC_CMP_SWAP : ABXI<0b1011, (outs GPR:$dst), (ins
i32imm:$ptr, i32imm:$old, i32imm:$new),
           "do_something",
           [(set GPR:$dst,
                 (atomic_cmp_swap_32 globaladdr:$ptr, imm:$old,
imm:$new))]>;
}

What I want to achieve first is that llc picks this definition when it
finds an occurance of the @atomic.cmp.swap.i32 intrinsic.

Therefore I wrote a basic .ll file containing only a call to this
function. I then let it run through "llvm-as | llc".

With the above definition I expected "do_something" to appears in the
assembler output when -march=arm. Unfortunately atm I still get the
error, telling me that the selection failed:

llvm-as < Atomics-32.ll | llc -march=arm
Cannot yet select: 0x1f7c540: i32,ch = AtomicCmpSwap 0x1f7cd00:1,
0x1f7cd00, 0x1f7c448, 0x1f7c350 <0x1f6fbe8:0> <volatile> alignment=4
Stack dump:
0.	Program arguments: llc -march=arm
1.	Running pass 'ARM Instruction Selection' on function
'@test_compare_and_swap'

I took a look at how the atomic_compare_swap implementation is done for
PowerPC and X86 but got no clue how it gets from atomic_cmp_swap_32 to
the target specific variant. Well, for X86 its done via a custom lowering.

Any idea how the DAG entry for ARM_ATOMIC_CMP_SWAP should look like so
that it is picked up by for the @atomic.cmp.swap.i32 intrinsic?


Regards
Robert

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