[LLVMdev] promotion of return value.

[Duncan Sands]

Hi Rafael, if the nasty hack I mentioned in the PR
was removed then the following code should work for
both X86 and ARM:

define signext i16 @f() nounwind {
entry:
        %0 = tail call signext i16 @h() nounwind 
        %1 = sext i16 %0 to i32
        tail call void @g(i32 %1) nounwind
        %2 = load i16* @x, align 2
        ret i16 %2
}

This is what llvm-gcc currently produces.  On x86
the value would be returned in an i16 register, so
no sign extension would be performed in the callee.
Thus the sign extension to i32 would occur in the
caller.

On the other hand, consider ARM.  There are no i16
registers on ARM, so the value would be returned in
an i32.  The signext attribute means that the callee
would sign extend the i16 to an i32 before returning
it.  Also, due to the signext attribute the caller
will know that the callee sign extended the i16 to
an i32, so the DAG combiner will drop the sign
extension in the caller as redundant.

Try the attached patch.

Ciao,

Duncan.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: call.diff
Type: text/x-patch
Size: 890 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090313/47661ed1/attachment.bin>