[LLVMdev] Tablegen question

Christian Sayer Christian.Sayer at dibcom.fr
Mon Jun 8 01:23:57 PDT 2009

I asked this question recently, but instead of telling you to search the archive
I'm going to take it as a chance to recall how to do it (because I'll do so anyway
and even telling tablegen to use an enum for instructions is not as trivial to do
as you might think : )

I wrote it up in the wiki at


  Christian SAYER

> -----Original Message-----
> From: llvmdev-bounces at cs.uiuc.edu
> [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Manjunath Kudlur
> Sent: Saturday, June 06, 2009 6:47 PM
> To: LLVM Developers Mailing List
> Subject: [LLVMdev] Tablegen question
> I want to add a set of "properties" to each instruction in my
> instruction set, and want to be able to query that in my
> machine-specific optimizations. My Insts.td file looks as follows :
> class InstProperty;
> def propX : InstProperty;
> def propY : InstProperty;
> def propZ : InstProperty;
> class myInst<..., list<InstProperty> props> : Instruction {
>   ...
>   ...
>   list<InstProperty> Properties=props;
> }
> def i1 : myInst<..., [propX]>;
> def i2 : myInst<..., [propX, propZ]>;
> def i3 : myInst<..., []>;
> I want to add a Tablegen backend that would look for Instructions
> derived from myInst, look for Properties field, and output a
> opcode->bitfield map as follows:
> PropMap[myInst::i1] = propX;
> PropMap[myInst::i2] = propX | propZ;
> PropMap[myInst::i3] = 0;
> where propX,propY,and propZ will be defined as appropriate enums.
> Now, I looked at the current Tablegen backends, and I didn't find any
> that are specific to a particular architecture backend, say, to X86 or
> Sparc etc.. That got me wondering if I am breaking some conventions
> and not doing things in the LLVM-way. Is what I am trying to do an
> intended use case for Tablegen? Why aren't there Tablegen backends
> specific to some architecture backends? I would be grateful for any
> advice from the community.
> Manjunath
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