[LLVMdev] Adding instructions to MachineBlock
keveman at gmail.com
Wed Jun 3 14:34:57 PDT 2009
You are right, there are other approaches possible. In my case, I want
to retain some vector operations. So I translated all LLVM vector
instructions to machine vector instructions. Then I am writing this
phase to selectively translate some vector instructions to scalar
counter parts. But I feel the question is independent of this issue. I
am basically trying to add a new instruction with a def to a register.
BB->insert is failing because RegInfo->getRegUseDefListHead(getReg())
On Wed, Jun 3, 2009 at 1:56 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> On Wed, Jun 3, 2009 at 12:46 PM, Manjunath Kudlur<keveman at gmail.com> wrote:
>> I am writing a MachineFunction pass that converts vector instructions
>> to a sequence of scalar instructions.
> Why? That really isn't the level you want to be doing that sort of
> thing normally. Usually, legalization turns illegal vector operations
> into legal scalar operations.
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