[LLVMdev] [Help Needed] tblgen code get a compile error

[Howard Su]

I am working the AVR backend. It is still in the early stage. I got the
following error:[ 86%] Building CXX object
lib/Target/AVR/CMakeFiles/LLVMAVRCodeGen.dir/AVRISelDAGToDAG.cpp.obj
AVRISelDAGToDAG.cpp
C:\llvm-build\lib\Target\AVR\AVRGenDAGISel.inc(596) : error C2664:
'llvm::SDNode *llvm::SelectionDAG::SelectNodeTo(llvm::SDNode *,unsigned
int,llvm::MVT,llvm::MVT,llvm::MVT,const llvm::SDValue *,unsigned int)' :
cannot convert parameter 6 from 'llvm::SDValue' to 'const llvm::SDValue *'
        No user-defined-conversion operator available that can perform this
conv
ersion, or the operator cannot be called

I checked the generated the code:
SDNode *Emit_2(const SDValue &N, unsigned Opc0, MVT VT0) DISABLE_INLINE {
  SDValue N0 = N.getOperand(0);
  SDValue N1 = N.getOperand(1);
  SDNode *ResNode = CurDAG->SelectNodeTo(N.getNode(), Opc0, VT0, MVT::i8,
MVT::Flag, N0, N1); <==== error here.
  SDValue InFlag(ResNode, 2);
  ReplaceUses(SDValue(N.getNode(), 1), InFlag);
  return ResNode;
}
SDNode *Select_ISD_ADDC_i8(const SDValue &N) {
  SDNode *Result = Emit_2(N, AVR::ADC, MVT::i8);
  return Result;
}

the related defines are:
def ADC : RR<7, "adc $dst, $src2", addc>;
class RR<bits<6> opcode, string asmstr, SDNode OpNode>
     : AVRInstr<(outs GR8:$dst), (ins GR8:$src1, GR8:$src2), asmstr,
       [(set GR8:$dst, (OpNode GR8:$src1, GR8:$src2)), (implicit SREG)]> {
   let Inst{15-10} = opcode;
}

class AVRInstr<dag outs, dag ins, string asmstr, list<dag> pattern>
        : Instruction {
  field bits<16> Inst;

  let Namespace = "AVR";

  dag OutOperandList = outs;
  dag InOperandList  = ins;

  let AsmString   = asmstr;
  let Pattern = pattern;
}

What I did in the wrong way?

-- 
-Howard
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