[LLVMdev] Possible error in LegalizeDAG

Eli Friedman eli.friedman at gmail.com
Wed Feb 18 15:01:04 PST 2009


On Wed, Feb 18, 2009 at 10:14 AM, Villmow, Micah <Micah.Villmow at amd.com> wrote:
> I'm still trying to track down some alignment issues with loads(i.e. 8/16
> bit loads being turned into 32bit sign extending loads) and I cannot for the
> life of me seem to figure out how to enter this section of code:
>
> // If this is an unaligned load and the target doesn't support it,
>
>             // expand it.

Why do you expect to enter this section of code?  It's impossible for
an i8 load to be unaligned.

> Any hints would be greatly appreciated, this is a blocking issue that I just
> cannot seem to resolve without modifying the LLVM codebase to remove the
> extend + load -> extload combining step.

LLVM will "uncombine" it for you if you use setLoadExtAction with the
appropriate arguments.

-Eli



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