[LLVMdev] Doubt related to scheduling with shift operation

Sachin.Punyani at microchip.com Sachin.Punyani at microchip.com
Sun Dec 13 18:17:00 PST 2009

> -----Original Message-----
> From: Duncan Sands [mailto:baldrick at free.fr]
> Sent: Friday, December 11, 2009 9:49 PM
> To: Sachin Punyani - I00202
> Cc: llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] Doubt related to scheduling with shift
> Hi,
> > My target is an 8-bit target. Therefore while performing a shift
> > or left) on long (32 bits) it is legalized in 4 smaller units. After
> > performing the shift, this value should be stored at the same
> > So order of the stores does matter. But all 4 stores are parallel in
> > code and do not have any control flow dependency between them.
> > these stores are scheduled in some order not correct for the result.
> I'm not sure what you mean by "should be stored at the same location",
> and I don't understand why the order matters.  Can you please explain.

Hi Duncan,

Thanks for your reply. It was my mistake in target specific code. I have
been able to figure out and fix the problem. 

Thanks for your support.


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