# [LLVMdev] Fwd: Adding multiples-of-8 integer types to MVT

OvermindDL1 overminddl1 at gmail.com
Sat Dec 5 16:58:45 PST 2009

```Grr...

---------- Forwarded message ----------
From: OvermindDL1 <overminddl1 at gmail.com>
Date: Sat, Dec 5, 2009 at 5:58 PM
Subject: Re: [LLVMdev] Adding multiples-of-8 integer types to MVT
To: Duncan Sands <duncan.sands at math.u-psud.fr>

On Sat, Dec 5, 2009 at 5:33 AM, Duncan Sands
<duncan.sands at math.u-psud.fr> wrote:
>>> Would there be any interest/opposition to extending the set of simple
>>> integer types in MVT to include the missing multiples of 8 (up to 64
>>> bits)? That is: i24, i40, i48, i56?
>
> By the way, the integer type legalization logic should probably go like
> this: let T be an integer type.
>
> (1) If T is legal, do nothing.
> (2) If there is a legal integer type which is bigger (in bitwidth) than T,
> then promote T to the smallest legal type which is bigger than T.
> (3) In the remaining case, T is necessarily bigger than the largest legal
> integer type (call this type L).  Take the smallest positive N such that
>  (bitwidth of T) <= (bitwidth of L) * 2^N
> If you have equality in the equation, i.e. if the bitwidth of T is a power
> of two multiple of the bitwidth of L, then expand T into two equal integer
> types of half the size.  Otherwise promote T to the type with bitwidth equal
> to the right-hand-side of the equation, i.e. (bitwidth of L) * 2^N.
>
> If all legal integer types have a power of two size, then this coincides
> with what we have today.  If some legal types do not have a power of 2
> size then finding the type to promote to in (2) requires more computation
> than in the power-of-two case.  For (3), you need to know the largest legal
> type L, which currently isn't exposed in a convenient way for this.  For
> simple integer types everything can of course be pre-calculated in tables,
> like now.  For extended integer types it would be good to have an efficient
> algorithm for calculating this on the fly.  At worst, values can be cached.

This makes the most sense to me as well.  I have used some embedded
chips (long time ago, but still...) that had a 7-bit wide bus and
register setup, certainly not a power of 2, not even even.

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