[LLVMdev] TableGen Enhancement Feasibility
just.s0m3.guy+llvmdev at gmail.com
Tue Apr 7 09:08:37 PDT 2009
Ok. I just have a vision of this stuff getting 'abused' to acheive odd
things in really really abstract and difficult to grok ways.
On Tue, Apr 7, 2009 at 6:03 PM, David Greene <dag at cray.com> wrote:
> On Tuesday 07 April 2009 01:18, someguy wrote:
> > Can you give an example of where you would use such a feature?
> > It seems entirely too abstract (at least to me) at the moment.
> Basically I wanted to pass the various prefix encoding classes (XS, XD,
> down into generic SIMD multiclasses so that we could write rr / rm patterns
> once and reuse them with different prefix encoding base classes for the
> various x86 SIMD instruction sets.
> These prefix bits are reused in AVX and I found myself duplicating all of
> SIMD boilerplate for AVX that already exists for SSE simply because the
> prefix encoding classes are hard-coded into the SSE classes.
> The way I'm going to do this is define some global prefix bits<> and pass
> those instead. I'll use these just for AVX initially but we can move SSE
> to them and share code going forward.
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