[LLVMdev] GSoC 2009 application
ksh.cseiitk at gmail.com
Fri Apr 3 00:52:37 PDT 2009
Here is my formal proposal i have submitted in gsoc. Comments invited.
I am a final semester Dual Degree( B.Tech. M.Tech.) student from Indian
Institute of Technology, Kanpur. I was looking forward to participate in
this year's GSoC 2009.Starting Fall 2009 i shall be pursuing a Phd in
compilers. I am having a good background in compilers. My current masters
thesis is aimed at automatic parallel code from c programs target for the
Cell Processor using speculative and runtime parallelization techniques. As
a part of this I am taking a profile driven approach to figure out the
program access paterns to accurately model the same.
I have been using the LLVm system for some time so am somewhat familiar with
the system. I have strong C/C++ skills acquired by working on several
projects including my thesis. Besides my thesis I have previously taken
classes on Compilers, compilers optimizations, parallel programming and
multicore architectures. As part of compilers class project I had to
implemented a compiler for the Oberon programming language from scratch.
Since several people are working on loop static loop dependence analysis, I
wish to extend this into the profile driven paradigm. The profile driven
approach can be useful in the following cases:-
1. Rarely occuring dependeccies.
2. Silent depencecies (harmless dependecies) eg. writing the same value a
The program can be profiled to obtain this information. Based on this
information the optimiser can selectively exercise the dependecy, making
checks in case of a wrong prediction. This will be particularly useful when
try to parallelize the code. The profile information can also be used to
obtain the actual desnsity of the loop to figure out the best
For achieving the above I propose to add the following passes to the LLVm
a. A profiling pass to record the timing, access and value information. This
shall be a 2 stage pass. Access / Value profiling is costly so shall be
applied only on the HOT code regions.
b.A loop transformation pass to use this information to speculatively
parallelize the loop. I aim to use the copy or discrad model  for
c.a loop transformation pass to use profile information to performa strip
mining and loop peeling.
a. Partial dead code ellimination,partial redundancy ellimination ,
conditional branch ellimination 
April 20 - May 23 -- Familiasing with the LLVM system and the cuurent Loop
passes implemented., reading the papers and forming a prelimnary coding plan
May 23 - June 7 -- profiling passes coded ,improved and tested. Passes
optimised to incorporate statically available information like loop
iterations,known aliases nd estimated parallelism
June 7 - June 21 -- Loop transformation pass converting the loop into a
speculative one using the copy or dicard model.
June 21 - July 7 - Loop peeling and strip mining passes.
July 7 - August 10 -- Maybes + Complete testing and documentation.
Copy or Discard execution model for speculative parallelization on
*Microarchitecture, 2008. MICRO-41. 2008 41st IEEE/ACM International
The Compiler Design Handbook Y. N. Srikant, Priti Shankar 143 - 171
On Fri, Mar 27, 2009 at 6:43 PM, Anton Korobeynikov <anton at korobeynikov.info
> Hello, Kshitiz
> > I was interested in taking up the project ideas on adding profile
> > optimization passes and improving alias analysis as this would give me a
> > chance to carry forward and improve my current work and also contribute
> > significantly in terms of tangibles.
> This sounds like a great idea. LLVM definitely lacks some
> profile-driven optimizations.
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
Department of Computer Science & Engineering
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