[LLVMdev] Tablegen strings

[Chris Lattner]

On Sep 23, 2008, at 11:00 AM, Villmow, Micah wrote:

> I have a tablegen string that I want to add a modifier to the  
> registers that are being matched.
>
> For example a simple match on fneg:
> def FNEG       : OneInOneOut<IL_OP_MOV, (outs GPR:$dst), (ins GPR: 
> $src0),
>     “mov $dst, $src0”,    [(set GPR:$dst, (fneg GPR:$src0))]>;
>
> I want to place a modifier directly after $src0 in the string so  
> that no space is between the string
> and the matched register. I.e. I want to generate “mov $dst,  
> $src0_neg”, however, by putting the
> _neg right after $src0 forces it to attempt to match against  
> src0_neg instead of just src0. Where
> can I find the rules for the string pattern matcher so that I can  
> added arbitrary strings into my
> definition.

Try using ${src0}_neg

-Chris

>
> Thanks,
>
>
> Micah Villmow
> Systems Engineer
> Advanced Technology & Performance
> Advanced Micro Devices Inc.
> 4555 Great America Pkwy,
> Santa Clara, CA. 95054
> P: 408-572-6219
> F: 408-572-6596
>
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