[LLVMdev] TableGen Calling Convention help

[Eli Friedman]

On Mon, Sep 15, 2008 at 4:51 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote:
> With my backend code gen I want to assign calling parameters to a list of
> registers, but since I'm targeting a virtual instruction set. I don't want
> to be limited by the number of registers. Is there a way using TableGen to
> specify just a starting register to assign to for the CallingConv class and
> then have it just use sequential registers?

No; you'll have to hack it to deal with an infinite register file.
The relevant bits are include/llvm/CallingConvLower.h,
utils/TableGen/CallingConvEmitter.cpp, and
lib/Target/TargetCallingConv.td.  None of the current LLVM targets
using CodeGen have infinite registers.

Although, what exactly is the calling convention?  Are the arguments
supposed to be in registers r0-rN, where N is the number of arguments?
 Or is there some way of specifying which registers to pass?  Where
does the caller save registers? Or does the target use something like
SPARC register windows?

-Eli