[LLVMdev] adde/addc

[Evan Cheng]

You may have to custom lower i64 arithmetics. You can make use of  
"flag" outputs to ensure the instructions are generated in the order  
you want. The instruction which produces a flag value and the user of  
the flag are "glued" together. They are scheduled as a single unit and  
nothing else can be scheduled in between.

Evan

On Sep 8, 2008, at 2:43 PM, Richard Pennington wrote:

> Evan Cheng wrote:
>> Legalizer will expand arithmetics using addc and adde. Is it not
>> working for you? It works fine on x86, you can take a look how it's
>> done.
>>
>> Evan
>
> The x86 has a carry bit, my target doesn't.
>
> It's not clear to me how I would specify the use of a general purpose
> register to contain the calculated carry in the current adde/addc  
> scheme.
>
> -Rich
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