[LLVMdev] adde/addc

[Richard Pennington]

My target doesn't support 64 bit arithmetic, so I'd like to supply 
definitions for adde/addc. The problem is I can't seem to figure out the 
magic. Here's an example of what I need to generate:

# two i64s in r5/r6 and r7/r8
# result in r1/r2, carry in r3

# adde
    add r2, r6, r8
    cmpltu r3, r2, r6	# compute carry

# addc
     add r1, r5, r7
     add r1, zero, r3

Is this possible given the current code generation stuff? Is there 
another approach that I should consider?

-Rich