[LLVMdev] mem2reg optimization

[David Greene]

On Monday 27 October 2008 02:08, Chris Lattner wrote:
> On Oct 26, 2008, at 11:09 PM, Chris Lattner wrote:
> >> Fundamentally, we need a map from BasicBlock to a list of ordered
> >> loads and
> >> stores in that block.
> >
> > Are you seeing cases where lots of time is spent in
> > RewriteSingleStoreAlloca[s]?  If so, please provide a testcase and I
> > can apply the obvious fix.
>
> Okay, I decided to just go ahead and make the change, with the
> justification that it is a significant code cleanup to mem2reg.
> Here's the patch:
> http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20081027/068970
>.html

Yes, this all looks good.  Sorry, I'd forgotten about our discussion of the 
use_iterator.  That's why we didn't need a map from BasicBlock.

The other place where I've seen iteration get us into trouble is the Verifier,
and specifically checking dominance among instructions in a large BasicBlock.;
I have a patch for this that is along the lines of your mem2reg fix.  I'll 
check it in this week.

Thanks!

                                                      -Dave