[LLVMdev] A question about LegalizeDAG.cpp and VAARG

Richard Pennington rich at pennware.com
Sun Oct 12 06:47:27 PDT 2008

I'm generating code for a target that only supports i32 natively.
My front end is generating VAARG for accessing varargs parameters.

The problem is that I get an assert when I compile this:

#include <stdarg.h>

int main(va_list ap)
     typedef double type;
     type tmp;

     tmp = va_arg(ap, type);

; ModuleID = 't0056.bc'
target datalayout = 
target triple = "nios2-elf"

define i32 @main(i8*) nounwind {
         %ap = alloca i8*                ; <i8**> [#uses=2]
         store i8* %0, i8** %ap
         %retval = alloca i32            ; <i32*> [#uses=2]
         store i32 0, i32* %retval
         %tmp = alloca double            ; <double*> [#uses=1]
         %1 = va_arg i8** %ap, double            ; <double> [#uses=1]
         store double %1, double* %tmp
         br label %return

return:         ; preds = %entry
         %2 = load i32* %retval          ; <i32> [#uses=1]
         ret i32 %2

If I make "type" long long, it works OK.

I tracked the problem down to this:
In the beginning of SelectionDAGLegalize::ExpandOp there is a call to
getTypeToTransformTo to get the type of the expanded parts.
In the case of i64, it returns i32 (as expected).
In the case of f64, it returns i64. The i64 causes the assert later in 

Looking at getTypeToTransformTo it seems that it is doing what it is
supposed to do, at least according to the comments.

My question is this: What is the correct way to fix this? I can call
getTypeToTransformTo twice and get the correct result, but that seems
Should the Hi and Lo values generated in VAARG should be expanded? If
so, how?


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