[LLVMdev] mem2reg optimization

Dan Gohman gohman at apple.com
Tue Oct 7 14:13:45 PDT 2008

On Oct 7, 2008, at 11:43 AM, David Greene wrote:

> On Tuesday 07 October 2008 12:37, Dan Gohman wrote:
>> On Tue, October 7, 2008 9:02 am, David Greene wrote:
>>> On Tuesday 07 October 2008 00:32, Nicolas Capens wrote:
>>>> Anyway, this can definitely also be done with an analysis pass that
>>>> provides information about ordering between loads and stores.  
>>>> It's just
>>> Actually, no it can't.  See the thread about analysis passes  
>>> depending on
>>> other analysis passes and when things do and don't get updated by
>>> PassManager.
>> How is this relevant? It sounds like what's needed are orderings
>> of loads and stores within each block. What other analyses would
>> such an analysis depend on?
> No, it's analysis that depend on the orderings of loads and stores  
> (or any
> instruction).  I ran across this need in another area.

I believe that there are problems, but I'm not seeing what
the problem is with an instruction ordering pass to be used
by mem2reg. Can you be more specific, or point me to the
thread where this was discussed?

>> I don't think an analysis pass is necessarily the best way to go
>> here. If it's easier for mem2reg to just keep track of what it needs
>> on its own that's fine. Making a pass would be useful if the
>> information would help other passes as well though.
> In this case, the information could be used by other passes as well.


>> Also, FWIW, this is a case where the terminology of analysis
>> "passes" and the general emphasis on "running" them is a little
>> misleading. Instead of having a runOnFunction that runs ahead and
>> precomputes information for the entire function, this kind of
>> analysis is a good match for the on-demand approach, where
>> runOnFunction does nothing, and information about each block is
>> computed the first time a query needs it.
> Sure.  The problem is in knowing when the information needs to be  
> recomputed.
> PassManager is nominally supposed to do that but it doesn't understand
> analyses depending on other analyses.

Mem2reg doesn't depend on any analyses that modify the IR. The
proposed instruction ordering analysis wouldn't need to depend
on any other analyses. What's the problem here?


More information about the llvm-dev mailing list