[LLVMdev] Invalid comparison instruction generation
isanbard at gmail.com
Mon Nov 10 17:12:25 PST 2008
On Mon, Nov 10, 2008 at 5:00 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote:
> Using the variables from the original IR,
> assuming tmp == tmp1 and assume the value is not nan
> ogt(tmp, tmp1) is !isnan(tmp) && !isnan(tmp1) && tmp > tmp1, or false
> ule(tmp, tmp1) is isnan(tmp) || isnan(tmp1) || tmp <= tmp1, or true
> So, this is invalid, or am I misunderstanding what ogt and ule stand
You'll notice in the "good.dot" graph that there's an "xor" after the
"setcc". So you basically have this in the original graph:
xor (setcc ogt %tmp1, %tmp2), 1
which is equivalent to
setcc ule %tmp1, %tmp2
There is a change from "ordered" to "unordered" comparison. But I
don't know if that will cause any troubles here.
> Assuming this is valid, why convert comparison instructions instead of
> just passing them through as they originally exist?
I'm assuming that it's trying to get rid of the "xor" instruction as
> The backend I am
> targeting does not support all comparison instructions and trying to
> guess which instruction LLVM converted the current comparison
> instruction from and then converting to a supported instruction is not
> as simple as it can be.
> For example, I need to convert all ogt instructions to an olt
> instruction with LHS and RHS swapped, but since ogt is converted to ule,
> do I convert all ule into olt and swap?
I would think that you would need your own custom lowering code to do
this. Have you declared these invalid operators as "Custom" in your
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