[LLVMdev] Use of flags in selection dags
evan.cheng at apple.com
Mon Mar 24 16:45:34 PDT 2008
On Mar 20, 2008, at 9:39 AM, Bagel wrote:
> Duncan Sands wrote:
>>> Can someone tell me, or point me to documentation, that explains
>>> the use
>>> of "flags" in the selection DAG? I figured out that, if one is
>>> present, it must be the last operand. But when are "flags" used
>>> and why?
>> Please give details of the context, such as the kind of node you
>> are looking at.
> I'm looking at this in general as one would when writing patterns
> for a
> new machine. It appears that flags are used in patterns that use or
> condition codes. Is this because the condition code register is not
> modelled or is it more that the dags can't handle two outputs. I just
> want to know what the rules are on when and how to use "flags".
X86 does model condition register as a "physical register output". But
other targets model them as flags. The later restrict scheduling
freedom. But if you don't care that much about it, it's easier to get
Flags are also used in other cases when you want to ensure the
instructions translated from the two selectiondag nodes are scheduled
at the same time.
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